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TMCNet:  U.S. Patents Awarded to Inventors in Minnesota (July 17)

[July 17, 2013]

U.S. Patents Awarded to Inventors in Minnesota (July 17)

(Targeted News Service Via Acquire Media NewsEdge) Targeted News Service Targeted News Service ALEXANDRIA, Va., July 17 -- The following federal patents were awarded to inventors in Minnesota.

*** Caridac Pacemakers Assigned Patent ALEXANDRIA, Va., July 17 -- Caridac Pacemakers, Saint Paul, Minn., has been assigned a patent (8,489,204) developed by six co-inventors for a "method and apparatus for identification of ischemic/infarcted regions and therapy optimization." The co-inventors are Shantha Arcot-Krishnamurthy, Vadnais Heights, Minn., Allan C. Shuros, Saint Paul, Minn., Jiang Ding, Shoreview, Minn., Yinghong Yu, Shoreview, Minn., Michael J. Stucky, Shoreview, Minn., and Christopher Hartemink, Shoreview, Minn.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method and apparatus is described for detecting and localizing areas of myocardial infarction or ischemia. By pacing sites in proximity to the infarcted or ischemic region with appropriately timed pacing pulses, the region is pre-excited in a manner that lessens the mechanical stress to which it is subjected, thus reducing the metabolic demand of the region and the stimulus for remodeling." The patent application was filed on July 9, 2012 (13/544,007). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,489,204.PN.&OS=PN/8,489,204&RS=PN/8,489,204 Written by Kusum Sangma; edited by Anand Kumar.

*** Lockheed Martin Assigned Patent ALEXANDRIA, Va., July 17 -- Lockheed Martin, Bethesda, Md., has been assigned a patent (8,489,865) developed by Joshua W. Rensch, Lakeville, Minn., Marlon O. Gunderson, Lake Elmo, Minn., and James V. Hedin, Eagan, Minn., for a "device, system, and method for single thread command chaining instructions from multiple processor elements." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A command chain system includes plurality of processing elements, a memory, and a chain engine. The chain engine is in communication with the memory and accesses instructions in the memory. The chain engine accesses a subroutine stored in the memory. The chain engine sends a command to a specialized hardware. The chain engine performs an action determined by one or more of the operation-code portion, the skip portion, and the loop-count portion of the instruction." The patent application was filed on April 15, 2010 (12/760,822). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,489,865.PN.&OS=PN/8,489,865&RS=PN/8,489,865 Written by Kusum Sangma; edited by Anand Kumar.

*** Medtronic Assigned Patent for Expandable Fixation Mechanism ALEXANDRIA, Va., July 17 -- Medtronic, Minneapolis, has been assigned a patent (8,489,189) developed by Carole A. Tronnes, Stillwater, Minn., for an "expandable fixation mechanism." The abstract of the patent published by the U.S. Patent and Trademark Office states: "In general, the invention is directed to a medical device implantable in a body of a patient. The device includes a housing with a plurality of collapsible fixation structures coupled to the housing, and can be in a collapsed configuration or an expanded configuration. The device assumes a collapsed configuration when in the bore of an insertion device, and assumes the expanded configuration when expelled from the insertion device into the body of the patient. The extended fixation structures engage the tissues in the body and restrict migration. One exemplary application of the invention is in the context of a microstimulator, with a pulse generator housed in the housing and one or more electrodes coupled to the housing. The fixation structures help keep the electrodes proximate to the tissues that are to receive the stimulation." The patent application was filed on Oct. 29, 2004 (10/977,500). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,489,189.PN.&OS=PN/8,489,189&RS=PN/8,489,189 Written by Kusum Sangma; edited by Anand Kumar.

*** Symantec Assigned Patent for Implementing Read/Write, Multi-versioned File System on Top of Backup Data ALEXANDRIA, Va., July 17 -- Symantec, Mountain View, Calif., has been assigned a patent (8,489,830) developed by Weibao Wu, Vadnais Heights, Minn., Mike Zeis, Minneapolis, and Tom Hartnett, Saint Paul, Minn., for "implementing read/write, multi-versioned file system on top of backup data." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Various embodiments of a computer system and methods are disclosed. In one embodiment, a computer system includes hosts coupled to a backup medium. The backup medium stores data segments and objects, each object referencing one or more segments. A second host conveys a write request to a first host identifying a data entity comprising segments referenced by a first object. The first host restores a copy of the data entity and creates a second object referencing the segments that were referenced by the first object in response to receiving the write request. The first host adds segment references to the second object in response to receiving a change that adds data to the copy or deletes a portion of a segment from the copy. The first host removes a segment reference from the second object if a change deletes all of a segment from the copy." The patent application was filed on March 30, 2007 (11/694,637). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,489,830.PN.&OS=PN/8,489,830&RS=PN/8,489,830 Written by Kusum Sangma; edited by Anand Kumar.

*** International Business Machines Assigned Patent for Performing a Deterministic Reduction Operation in a Compute Node Organized Into a Branched Tree Topology ALEXANDRIA, Va., July 17 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,489,859) developed by four co-inventors for "performing a deterministic reduction operation in a compute node organized into a branched tree topology." The co-inventors are Charles J. Archer, Rochester, Minn., Michael A. Blocksome, Rochester, Minn., Joseph D. Ratterman, Rochester, Minn., and Brian E. Smith, Rochester, Minn.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Performing a deterministic reduction operation in a parallel computer that includes compute nodes, each of which includes computer processors and a CAU (Collectives Acceleration Unit) that couples computer processors to one another for data communications, including organizing processors and a CAU into a branched tree topology in which the CAU is a root and the processors are children; receiving, from each of the processors in any order, dummy contribution data, where each processor is restricted from sending any other data to the root CAU prior to receiving an acknowledgement of receipt from the root CAU; sending, by the root CAU to the processors in the branched tree topology, in a predefined order, acknowledgements of receipt of the dummy contribution data; receiving, by the root CAU from the processors in the predefined order, the processors' contribution data to the reduction operation; and reducing, by the root CAU, the processors' contribution data." The patent application was filed on May 28, 2010 (12/790,037). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,489,859.PN.&OS=PN/8,489,859&RS=PN/8,489,859 Written by Kusum Sangma; edited by Anand Kumar.

*** International Business Machines Assigned Patent for Analysis of Nodal Affinity Behavior ALEXANDRIA, Va., July 17 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,489,700) developed by Henry J. May, Mantorville, Minn., and Richard K. Kirkman, Rochester, Minn., for an "analysis of nodal affinity behavior." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Method for measuring the performance of a multi-nodal computer system. In one embodiment, a number of system related events may be instrumented. When an instrumented event occurs, instrumentation routines may be invoked to record the state of system variables related to the event. In particular, events such as thread creation, dispatch, and nodal events such as events related to verifying or changing workload distribution in a multi-nodal system, among others, may be instrumented to record the state of variables as these events occur in a running multi-nodal computer system." The patent application was filed on Nov. 30, 2005 (11/290,883). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=84,89,700.PN.&OS=PN/84,89,700&RS=PN/84,89,700 Written by Amal Ahmed; edited by Jaya Anand.

*** Cardiac Pacemakers Assigned Patent for System and Method for Receiving Telemetry Data from an Implantable Medical Device ALEXANDRIA, Va., July 17 -- Cardiac Pacemakers, Saint Paul, Minn., has been assigned a patent (8,489,197) developed by Steven Schmitt, Stillwater, Minn., Fred Schleifer, Prior Lake, Minn., and Joseph E. Bange, Eagan, Minn., for a "system and method for receiving telemetry data from an implantable medical device." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system and method for receiving telemetry data from implantable medical devices such as cardiac pacemakers with improved noise immunity is disclosed. Ambient noise levels and signal strength are monitored and used to adaptively adjust the detection sensitivity of the receiver. Filtering of the received signal is performed to remove both broadband and narrowband noise. Removal of narrowband noise is accomplished with notch filters that are dynamically adjusted in accordance with a detected noise spectrum." The patent application was filed on Feb. 26, 2007 (11/678,766). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,489,197.PN.&OS=PN/8,489,197&RS=PN/8,489,197 Written by Kusum Sangma; edited by Anand Kumar.

*** Medtronic Assigned Patent for System, Apparatus and Method for Interacting with a Targeted Tissue of a Patient ALEXANDRIA, Va., July 17 -- Medtronic, Minneapolis, has been assigned a patent (8,489,196) developed by Keith Alan Miesel, Saint Paul, Minn., Sudha Nagavarapu, Saint Paul, Minn., and Randall Maas, Chaska, Minn., for a "system, apparatus and method for interacting with a targeted tissue of a patient." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method and an apparatus are provided for interacting with targeted tissue of a patient. The apparatus comprises a central control module, a satellite module, and a lead. The satellite module comprises a processor, a communication module, a switching module, a memory, a sense amp, and a A/D converter. The apparatus is adapted for subcutaneous implantation. The central control module is coupled to the satellite module. The lead is coupled to the satellite module. A programming word comprising information to be sent to the satellite module is provided. The programming word is converted into identifiable groups of pulses corresponding to bits of the programming word. The identifiable groups of pulses are sent to the satellite module. The identifiable groups of pulses are converted to information for providing a therapy to the patient. The energy from the identifiable groups of pulses is stored to power the satellite module." The patent application was filed on Oct. 3, 2003 (10/678,402). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,489,196.PN.&OS=PN/8,489,196&RS=PN/8,489,196 Written by Kusum Sangma; edited by Anand Kumar.

*** Fisher-Rosemount Systems Assigned Patent ALEXANDRIA, Va., July 17 -- Fisher-Rosemount Systems, Round Rock, Texas, has been assigned a patent (8,489,360) developed by Marcus R. Lundeberg, Bloomington, Minn., Nikola Samardzija, Minnetonka, Minn., and John P. Miller, Eden Prairie, Minn., for a "multivariate monitoring and diagnostics of process variable data." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system and method of monitoring and diagnosing on-line multivariate process variable. Multivariate process data includes multiple process variables each having a multiple observations. On-line process data is collected from a process control system when the process is on-line. The on-line process data includes multiple observations of multiple process variables. A multivariate statistical analysis represents the operation of the process based on a set of the on-line process data. The representation a result. The representation and the set of on-line process data are stored. An output is generated based on a parameter of the representation. The parameter includes a result generated by the representation of the operation of the process, a process variable used to generate the representation of the operation of the process and/or the set of collected on-line process data." The patent application was filed on March 20, 2007 (11/688,795). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=84,89,360.PN.&OS=PN/84,89,360&RS=PN/84,89,360 Written by Kusum Sangma; edited by Anand Kumar.

*** International Business Machines Assigned Patent for Data Communications between the Computer Memory of the Logical Partitions and the Data Storage Devices through a Host Fibre Channel Adapter ALEXANDRIA, Va., July 17 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,489,848) developed by four co-inventors for a "data communications between the computer memory of the logical partitions and the data storage devices through a host fibre channel adapter." The co-inventors are Ellen M. Bauman, Rochester, Minn., Timothy J. Schimke, Stewartville, Minn., Lee A. Sendelbach, Rochester, Minn., and Joseph T. Writz, Rochester, Minn.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Data communications through a host Fibre Channel adapter (`HFCA`) implemented with a computer that includes two or more logical partitions, each logical partition including a separate instance of an operating system, each instance of an operating system including an instance of a low-level, switched fabric input/output (`I/O`) library, including establishing, in the HFCA by instances of the I/O library in two or more logical partitions and by the hypervisor, separate logical Fibre Channel adapters (`LFCAs`) for at least two of the logical partitions, each LFCA including an association of an LFCA identifier with at least one range of I/O memory addresses in the address space of a logical partition and transferring, at the behest of application programs in the two or more logical partitions, data between the RAM of the logical partitions and the data storage devices through the LFCAs, the HFCA, and the Fibre Channel fabric." The patent application was filed on April 20, 2012 (13/451,868). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,489,848.PN.&OS=PN/8,489,848&RS=PN/8,489,848 Written by Kusum Sangma; edited by Anand Kumar.

*** Holaira Assigned Patent ALEXANDRIA, Va., July 17 -- Holaira, Plymouth, Minn., has been assigned a patent (8,489,192) developed by Edwin J. Hlavka, Minneapolis, and Lynn Elliott, Maple Grove, Minn., for a "system and method for bronchial dilation." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method of reducing bronchial constriction in a subject includes delivering energy to create one or more lesions on a main bronchus so as to transect pulmonary nerves sufficiently to reduce bronchial constriction in a lung of the patient distal to the main bronchus." The patent application was filed on June 14, 2012 (13/523,223). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,489,192.PN.&OS=PN/8,489,192&RS=PN/8,489,192 Written by Kusum Sangma; edited by Anand Kumar.

*** International Business Machines Assigned Patent for Thermal Cycling and Gradient Management in Three-dimensional Stacked Architectures ALEXANDRIA, Va., July 17 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,489,217) developed by four co-inventors for a "thermal cycling and gradient management in three-dimensional stacked architectures." The co-inventors are Chen-Yong Cher, Port Chester, N.Y., Wilfried E. Haensch, Somers, N.Y., Eren Kursun, Ossining, N.Y., and David R. Motschman, Rochester, Minn.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A mechanism is provided for minimizing reliability problems in a three-dimensional (3D) integrated circuit. A set of sensors are interrogated for current data. A direction of force and a magnitude of the force are determined based on the current data for each sensor in the set of sensors for each of one or more directions between the sensor and at least one neighboring sensor thereby forming a set of forces. Each of the set of forces is used to identify one or more points of stress that are at or above the predetermined force threshold. Responsive to identifying at least one point of stress that is at or above the predetermined force threshold, one or more temperature actuation actions are initiated in order to reduce at least one point of stress in the region where the at least one point of stress is identified." The patent application was filed on Jan. 4, 2011 (12/984,096). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,489,217.PN.&OS=PN/8,489,217&RS=PN/8,489,217 Written by Kusum Sangma; edited by Anand Kumar.

*** International Business Machines Assigned Patent for Distributed Virtual Bridge Management ALEXANDRIA, Va., July 17 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,489,763) developed by seven co-inventors for "distributed virtual bridge management." The co-inventors are William J. Armstrong, Rochester, Minn., Claude Basso, Raleigh, N.C., Josep Cors, Rochester, Minn., David R. Engebretsen, Cannon Falls, Minn., Kyle A. Lucke, Oronoco, Minn., Jeffrey J. Lynch, Apex, N.C., and Bruce M. Walk, Rochester, Minn.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Systems and methods to forward data frames are described. A particular method may include receiving a data frame at a switch of a plurality of networked switches coupled to a plurality of server computers. The data frame may be forwarded from a controlling bridge coupled to the plurality of networked switches. The data frame may be determined to include management data, and an operating parameter of the switch may be modified." The patent application was filed on April 20, 2010 (12/763,306). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=84,89,763.PN.&OS=PN/84,89,763&RS=PN/84,89,763 Written by Amal Ahmed; edited by Jaya Anand.

*** International Business Machines Assigned Patent for Managing Logically Bad Blocks in Storage Devices ALEXANDRIA, Va., July 17 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,489,946) developed by Robert E. Galbraith, Rochester, Minn., Adrian C. Gerhard, Rochester, Minn., and Daniel F. Moertl, Rochester, Minn., for "managing logically bad blocks in storage devices." The abstract of the patent published by the U.S. Patent and Trademark Office states: "At least one standard size data block of a storage device is scanned for a logically bad pattern. If the logically pad pattern is detected, a block address that is associated with the standard size data block is added to a bad block table. If the logically pad pattern is not detected, it may be determined if the block address associated with the standard size data block is in the bad block table. If the logically pad pattern is not detected and if the block address associated with the standard size data block is in the bad block table, the block address may be removed from the bad block table. The logically bad pattern may have a first predefined data portion and a second predefined data portion and may be repeated the requisite number of instances to fill the standard size data block." The patent application was filed on Sept. 13, 2012 (13/614,805). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,489,946.PN.&OS=PN/8,489,946&RS=PN/8,489,946 Written by Kusum Sangma; edited by Anand Kumar.

*** International Business Machines Assigned Patent for Sharing Sampled Instruction Address Registers for Efficient Instruction Sampling in Massively Multithreaded Processors ALEXANDRIA, Va., July 17 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,489,787) developed by five co-inventors for "sharing sampled instruction address registers for efficient instruction sampling in massively multithreaded processors." The co-inventors are Etai Adar, Yokneam Ilit, Israel, Russell D. Hoover, Rochester, Minn., Srinivasan Ramani, Cary, N.C., Eric F. Robinson, Raleigh, N.C., and Thuong Q. Truong, Austin, Texas.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Sampled instruction address registers are shared among multiple threads executing on a plurality of processor cores. Each of a plurality of sampled instruction address registers are assigned to a particular thread running for an application on the plurality of processor cores. Each of the sampled instruction address registers are configured by storing in each of the sampled instruction address registers a thread identification of the particular thread in a thread identification field and a processor identification of a particular processor on which the particular thread is running in a processor identification field." The patent application was filed on Oct. 12, 2010 (12/902,491). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=84,89,787.PN.&OS=PN/84,89,787&RS=PN/84,89,787 Written by Amal Ahmed; edited by Jaya Anand.

*** International Business Machines Assigned Patent for Virtual World Embedded Security Watermarking ALEXANDRIA, Va., July 17 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,489,883) developed by four co-inventors for a "virtual world embedded security watermarking." The co-inventors are Richard Dean Dettinger, Rochester, Minn., Lydia Mai Do, Research Triangle Park, N.C., Frederick Allyn Kulack, Rochester, Minn., and Kevin Glynn Paterson, San Antonio.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method, apparatus, and program product are provided for using watermarks to embed security features on avatars in a virtual world. A watermark engine receives security information for an avatar in a virtual world. The watermark engine creates a watermark for the avatar using the security information and associates the watermark with the avatar. The watermark may comprise at least one of: security preferences for the avatar, contact information for an owner of the avatar, and graphical information to cause alteration of the avatar when the avatar is recorded." The patent application was filed on Sept. 17, 2009 (12/561,752). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,489,883.PN.&OS=PN/8,489,883&RS=PN/8,489,883 Written by Kusum Sangma; edited by Anand Kumar.

*** International Business Machines Assigned Patent for Verification for Computer Programs that Include External Call References ALEXANDRIA, Va., July 17 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,490,184) developed by four co-inventors for a "verification for computer programs that include external call references." The co-inventors are Michael Brinker, Rochester, Minn., Rick Dale Hemmer, Rochester, Minn., Daniel Mark Hursh, Saint Charles, Minn., and Jeffrey Mark Uehling, Rochester, Minn.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A program verification mechanism includes an external call reference verification mechanism that verifies external call references in a computer program. The external call reference verification mechanism checks the computer program after the computer program has been loaded by a loader/linker. The loader/linker stores a list of trusted entry points that specifies a trusted entry point for each external call reference, along with a list of allowable caller code for each trusted entry point. The external call reference verification mechanism determines the entry point for each instruction that is an external call reference, determines whether the entry point is listed as the trusted entry point for the external call reference, and whether the external call reference instruction is in the list of allowable caller code for the trusted entry point. If so, the computer program is verified. If not, verification of the computer program fails." The patent application was filed on April 26, 2007 (11/740,422). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,490,184&OS=8,490,184&RS=8,490,184 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Richard Harrison Site Design Assigned Patent ALEXANDRIA, Va., July 17 -- Richard Harrison Site Design, Golden Valley, Minn., has been assigned a patent (8,490,024) developed by Richard M. Harrison, St. Louis Park, Minn., Adam J. Harrison, Elk River, Minn., and Keith M. Willenson, St. Paul, Minn, for a land plan development.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Systems and methods for development of a land plan can include a user interface having a first display module for displaying tool buttons, the tool buttons operable to perform a function associated with a land plan, wherein a first tool button of the tool buttons is operable to define an element of the land plan, a second display module for displaying a set of tool box buttons, each tool box button operable to cause the first display module to display different sets of the tool buttons for performing functions associated with the land plan, and a third display module for displaying information relating to the element of the land plan. The user interface can also include a planning window for generating a graphical representation of the land plan, the graphical representation of the land plan including the element." The patent application was filed on Feb. 28, 2008 (12/039,448). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,490,024&OS=8,490,024&RS=8,490,024 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Travel Tags Assigned Patent ALEXANDRIA, Va., July 17 -- Travel Tags, North Mankato, Minn., has been assigned a patent (RE44,370) developed by John Tomczyk, Shoreview, Minn., for "lenticular card and processes for making." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A process for making a lenticular card including: providing an imaged transparent sheet having a first smooth side and a second side with a lenticulated region, the transparent sheet optionally having at least one printed image area on the first smooth side and a moisture cure adhesive layer over the printed image areas and non-image areas of the first smooth side, and the moisture cure adhesive layer being applied with a screen press through a screen; and combining the imaged transparent sheet on the adhesive layer side of the transparent sheet with a backing sheet by nipping the paired sheets with a nip roller. The invention also provides processes useful for preparing a lenticular card including an optional core sheet, or optional primer layers." The patent application was filed on July 10, 2008 (12/170,858). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=RE44,370&OS=RE44,370&RS=RE44,370 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Non-uniform Memory Access (NUMA) Enhancements for Shared Logical Partitions ALEXANDRIA, Va., July 17 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,490,094) developed by six co-inventors for a "non-uniform memory access (NUMA) enhancements for shared logical partitions." The co-inventors are Vaijayanthimala K. Anand, Austin, Texas, Mark R. Funk, Mantorville, Minn., Steven R. Kunkel, Rochester, Minn., Mysore S. Srinivas, Austin, Texas, Randal C. Swanberg, Round Rock, Texas, and Ronald D. Young, Zumbrota, Minn.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "In a NUMA-topology computer system that includes multiple nodes and multiple logical partitions, some of which may be dedicated and others of which are shared, NUMA optimizations are enabled in shared logical partitions. This is done by specifying a home node parameter in each virtual processor assigned to a logical partition. When a task is created by an operating system in a shared logical partition, a home node is assigned to the task, and the operating system attempts to assign the task to a virtual processor that has a home node that matches the home node for the task. The partition manager then attempts to assign virtual processors to their corresponding home nodes. If this can be done, NUMA optimizations may be performed without the risk of reducing the performance of the shared logical partition." The patent application was filed on Feb. 27, 2009 (12/394,669). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,490,094&OS=8,490,094&RS=8,490,094 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Hickey & Associates Assigned Patent ALEXANDRIA, Va., July 17 -- Hickey & Associates, Plymouth, Minn., has been assigned a patent (8,490,182) developed by Michael P. Hickey, Plymouth, Minn., for an "apparatus and approach for electronic data management, processing and implementation." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Electronic processing and management of electronic project data is facilitated. According to an example embodiment of the present invention, project data including incentives data is processed for a plurality of different projects, using authentication to control data communication and access. Incentive-related data fields are automatically updated upon the receipt of project data, and authenticated users are provided access to the data in real-time." The patent application was filed on Dec. 6, 2011 (13/312,230). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,490,182&OS=8,490,182&RS=8,490,182 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Data Communications for a Collective Operation in a Parallel Active Messaging Interface of a Parallel Computer ALEXANDRIA, Va., July 17 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,490,112) developed by Daniel A. Faraj, Rochester, Minn., for "data communications for a collective operation in a parallel active messaging interface of a parallel computer." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Algorithm selection for data communications in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI composed of data communications endpoints, each endpoint including specifications of a client, a context, and a task, endpoints coupled for data communications through the PAMI, including associating in the PAMI data communications algorithms and bit masks; receiving in an origin endpoint of the PAMI a collective instruction, the instruction specifying transmission of a data communications message from the origin endpoint to a target endpoint; constructing a bit mask for the received collective instruction; selecting, from among the associated algorithms and bit masks, a data communications algorithm in dependence upon the constructed bit mask; and executing the collective instruction, transmitting, according to the selected data communications algorithm from the origin endpoint to the target endpoint, the data communications message." The patent application was filed on Dec. 3, 2010 (12/959,539). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,490,112&OS=8,490,112&RS=8,490,112 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Messaging in a Parallel Computer Using Remote Direct Memory Access ('RDMA') ALEXANDRIA, Va., July 17 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,490,113) developed by four co-inventors for a "messaging in a parallel computer using remote direct memory access ('RDMA')." The co-inventors are Michael E. Aho, Rochester, Minn., Thomas M. Gooding, Rochester, Minn., Michael B. Mundy, Rochester, Minn., and Andrew T. Tauferner, Rochester, Minn.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Messaging in a parallel computer using remote direct memory access (`RDMA`), including: receiving a send work request; responsive to the send work request: translating a local virtual address on the first node from which data is to be transferred to a physical address on the first node from which data is to be transferred from; creating a local RDMA object that includes a counter set to the size of a messaging acknowledgment field; sending, from a messaging unit in the first node to a messaging unit in a second node, a message that includes a RDMA read operation request, the physical address of the local RDMA object, and the physical address on the first node from which data is to be transferred from; and receiving, by the first node responsive to the second node's execution of the RDMA read operation request, acknowledgment data in the local RDMA object." The patent application was filed on June 24, 2011 (13/167,911). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,490,113&OS=8,490,113&RS=8,490,113 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Resource Allocation Management Using IOC Token Requestor Logic ALEXANDRIA, Va., July 17 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,490,102) developed by Glen H. Handlogten, Rochester, Minn., and John D. Irish, Rochester, Minn., for a "resource allocation management using IOC token requestor logic." The abstract of the patent published by the U.S. Patent and Trademark Office states: "In a first aspect, a first method is provided for managing system resource allocation. The first method includes the steps of (1) receiving a first command that requires a system resource; (2) receiving a first request for the system resource for the first command; (3) receiving a second command that requires the system resource; (4) assigning the system resource to the second command; and (5) receiving a second request for the system resource for the second command. Numerous other aspects are provided." The patent application was filed on July 29, 2004 (10/901,547). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,490,102&OS=8,490,102&RS=8,490,102 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Network on Chip with a Low Latency, High Bandwidth Application Messaging Interconnect ALEXANDRIA, Va., July 17 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,490,110) developed by four co-inventors for a "network on chip with a low latency, high bandwidth application messaging interconnect." The co-inventors are Russell D. Hoover, Rochester, Minn., Jon K. Kriegel, Rochester, Minn., Eric O. Mejdrich, Rochester, Minn., and Robert A. Shearer, Rochester, Minn.

The abstract of the patent published by the U.S. Patent and Trademark Office states: " Data processing on a network on chip (`NOC`) that includes integrated processor (`IP`) blocks, routers, memory communications controllers, and network interface controllers, with each IP block adapted to a router through a memory communications controller and a network interface controller, where each memory communications controller controlling communications between an IP block and memory, each network interface controller controlling inter-IP block communications through routers, with each IP block also adapted to the network by a low latency, high bandwidth application messaging interconnect comprising an inbox and an outbox. " The patent application was filed on Feb. 15, 2008 (12/031,738). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,490,110&OS=8,490,110&RS=8,490,110 Written by Satyaban Rath; edited by Hemanta Panigrahi.

For more information about Targeted News Service products and services, please contact: Myron Struck, editor, Targeted News Service LLC, Springfield, Va., 703/304-1897; editor@targetednews.com; http://targetednews.com.

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