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TMCNet:  U.S. Patents Awarded to Inventors in Arizona (Nov. 21)

[November 21, 2012]

U.S. Patents Awarded to Inventors in Arizona (Nov. 21)

(Targeted News Service Via Acquire Media NewsEdge) Targeted News Service Targeted News Service ALEXANDRIA, Va., Nov. 21 -- The following federal patents were awarded to inventors in Arizona.

*** IQLP Assigned Patent ALEXANDRIA, Va., Nov. 21 -- IQLP, New York, has been assigned a patent (RE43,807) developed by Michael A. Zimmerman, North Andover, Mass., and Jonathan Harris, Scottsdale, Ariz., for a "microcircuit package having ductile layer." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A microcircuit package having a ductile layer between a copper flange and die attach. The ductile layer absorbs the stress between the flange and semiconductor device mounted on the flange, and can substantially reduce the stress applied to the semiconductor device. In addition, the package provides the combination of copper flange and polymeric dielectric with a TCE close to copper, which results in a low stress structure of improved reliability and conductivity." The patent application was filed on Jan. 12, 2012 (13/348,934). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=RE43,807&OS=RE43,807&RS=RE43,807 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Embedded Computing - Emerson Network Power Assigned Patent ALEXANDRIA, Va., Nov. 21 -- Embedded Computing - Emerson Network Power, Tempe, Ariz., has been assigned a patent (8,316,341) developed by Douglas L. Sandy, Chandler, Ariz., and Shlomo Pri-Tal, Phoenix, for a "hardware description language (HDL) generation systems and methods for custom circuit boards." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system comprises an input and a hardware description language (HDL) module. The input receives design specifications for a custom circuit board. The design specifications are selected from predetermined design options for custom circuit boards. The hardware description language (HDL) module generates HDL corresponding to the design specifications and outputs the HDL to a circuit board producer." The patent application was filed on Sept. 17, 2009 (12/561,329). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,316,341&OS=8,316,341&RS=8,316,341 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Concept Hedging Assigned Patent ALEXANDRIA, Va., Nov. 21 -- Concept Hedging, Miami, has been assigned a patent (8,315,937) developed by Matthew B. Schoen, Ojai, Calif., Wayne F. Perg, Sierra Vista, Ariz., and John Andrew Pfleger, Miami, for an "apparatus, article, and method for a hedged specified event bond." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method, machine, article for a hedged specified event bond. The method can include: storing in memory terms of a bond indenture whereby proceeds from the bond are placed in a bankruptcy-remote entity, an investment is purchased, a risk associated with the investment is hedged, and a scheduled investor payment is adjusted if a specified event occurs; determining, by a digital computer accessing the memory and receiving market data and data corresponding to the specified event, a payment amount to the entity, a scheduled investor payment amount by the entity, a value of assets of the entity, whether there has been an occurrence of the specified event, and if an occurrence is determined, computing an adjustment in the scheduled payment; and outputting, by the computer, at least one of the payment amount to the entity, the scheduled investor payment amount, the value, and, if the occurrence is determined, the adjustment." The patent application was filed on Aug. 4, 2010 (12/850,584). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,315,937&OS=8,315,937&RS=8,315,937 Written by Neha Bharti; edited by Jaya Anand.

*** American Express Travel Related Services Assigned Patent for Using Commercial Share of Wallet to Manage Vendors ALEXANDRIA, Va., Nov. 21 -- American Express Travel Related Services, New York, has been assigned a patent (8,315,933) developed by eight co-inventors for "using commercial share of wallet to manage vendors." The co-inventors are Kathleen Haggerty, Staten Island, N.Y., Charles Christopher Lyon, Phoenix, Benedict O. Okoh, New York, Robert E. Phelan, Mendham, N.J., Jon Kevin Ruterman, Glendale, Ariz., Geraldine A. Turner, Sandy Hook, Va., Chao M. Yuan, Montclair, N.J., and Arnab Biswas, Calcutta, India.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Commercial size of spending wallet ("CSoSW") is the total business spend of a business including cash but excluding bartered items. Commercial share of wallet ("CSoW") is the portion of the spending wallet that is captured by a particular financial company. A modeling approach utilizes various data sources to provide outputs that describe a company's spend capacity. Government agencies, procurement departments, and others that patronize small businesses can use CSoW/CSoSW to determine businesses that should be awarded contracts and businesses that should be denied. CSoW/CSoSW may also be used to manage approved vendor lists." The patent application was filed on Jan. 23, 2012 (13/356,270). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,315,933&OS=8,315,933&RS=8,315,933 Written by Neha Bharti; edited by Jaya Anand.

*** Google Assigned Patent ALEXANDRIA, Va., Nov. 21 -- Google, Mountain View, Calif., has been assigned a patent (8,316,382) developed by Gueorgui Djabarov, Tucson, Ariz., and Yefim Tetelman, Belmont, Calif., for a "per-value user notification throttling in a software application." The abstract of the patent published by the U.S. Patent and Trademark Office states: "The present invention throttles notifications to a user based on changes in particular state values. A computer-implemented method manages notifications of changes to one or more settings of an application. The method includes: displaying a first notification of a change of a setting to a value; updating a count of notifications displayed for the value; and throttling a subsequent notification of a subsequent change of the setting to the value if the count exceeds a threshold." The patent application was filed on Oct. 6, 2008 (12/246,283). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,316,382&OS=8,316,382&RS=8,316,382 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Convolution-encoded Data Storage on a Redundant Array of Independent Devices ALEXANDRIA, Va., Nov. 21 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,316,259) developed by Daniel James Winarski, Tucson, Ariz., Craig A. Klein, Tucson, Ariz., and Nils Haustein, Zornheim, Germany, for a "convolution-encoded data storage on a redundant array of independent devices." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method, system and article of manufacture for the storing convolution-encoded data on a redundant array of independent storage devices (RAID) is described. The convolution-encoded data comprises error correction coded data to eliminate the need for parity as used in conventional RAID data storage. The number of storage devices may vary to accommodate expansion of storage capacity and provide on demand storage." The patent application was filed on July 15, 2008 (12/173,732). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,316,259.PN.&OS=PN/8,316,259&RS=PN/8,316,259 Written by Kusum Sangma; edited by Anand Kumar.

*** Honeywell International Assigned Patent ALEXANDRIA, Va., Nov. 21 -- Honeywell International, Morristown, N.J., has been assigned a patent (8,316,192) developed by Scott Gray, Peoria, Ariz., and Nicholas Wilt, Glendale, Ariz., for a "multiple-port memory systems and methods." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Systems and methods for improved multiple-port memory are provided. In one embodiment, a processing system comprises: at least one processing core; a peripheral bus; and a memory for storing digital data, the memory divided into a first and a second partition of memory segments. The memory includes a first port coupled to the peripheral bus providing read access and write access only to the first partition, wherein the first partition stores peripheral data associated with one or more peripheral components coupled to the peripheral bus; a second port coupled to the at least one processor providing read-only access to only the second partition, wherein the second partition stores executable code for the at least one processing core; and a third port coupled to the at least one processor providing read access and write access to the entire first partition and the second partition." The patent application was filed on Oct. 8, 2009 (12/575,709). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=83,16,192.PN.&OS=PN/83,16,192&RS=PN/83,16,192 Written by Kusum Sangma; edited by Anand Kumar.

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-1105967 (c) 2012 Targeted News Service

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