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TMCNet:  U.S. Patents Awarded to Inventors in Texas (Nov. 15)

[November 15, 2012]

U.S. Patents Awarded to Inventors in Texas (Nov. 15)

(Targeted News Service Via Acquire Media NewsEdge) Targeted News Service Targeted News Service ALEXANDRIA, Va., Nov. 15 -- The following federal patents were awarded to inventors in Texas.

*** International Business Machines Assigned Patent for User-specified Install Locations ALEXANDRIA, Va., Nov. 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,312,445) developed by four co-inventors for user-specified install locations. The co-inventors are Julie Levell Craft, Austin, Texas, Roji John, Austin, Texas, Edward Shvartsman, Austin, Texas, and Marc Joel Stephenson, Austin, Texas.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Computer implemented methods, data processing systems and computer program products install deliverables into user-specified install locations. A user-specified install location is provided. Software virtual product data is extracted from a software bundle. Software virtual product data is stored within the user-specified install location." The patent application was filed on Oct. 1, 2007 (11/865,493). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,312,445&OS=8,312,445&RS=8,312,445 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for System and Method for Optimizing Interrupt Processing in Virtualized Environments ALEXANDRIA, Va., Nov. 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,312,456) developed by David Alan Hepkin, Austin, Texas, Sujatha Kashyap, Austin, Texas, and Bret Ronald Olszewski, Austin, Texas, for a "system and method for optimizing interrupt processing in virtualized environments." The abstract of the patent published by the U.S. Patent and Trademark Office states: "An approach is provided that retrieves a time spent value corresponding to a selected partition that is selected from a group of partitions included in a virtualized environment running on a computer system. The virtualized environment is provided by a Hypervisor. The time spent value corresponds to an amount of time the selected partition has spent processing interrupts. A number of virtual CPUs have been assigned to the selected partition. The time spent value (e.g., a percentage of the time that the selected partition spends processing interrupts) is compared to one or more interrupt threshold values. If the comparison reveals that the time that the partition is spending processing interrupts exceeds a threshold, then the number of virtual CPUs assigned to the selected partition is increased." The patent application was filed on May 30, 2008 (12/129,808). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,312,456&OS=8,312,456&RS=8,312,456 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Intel Assigned Patent ALEXANDRIA, Va., Nov. 15 -- Intel, Santa Clara, Calif., has been assigned a patent (8,312,452) developed by five co-inventors for a "method and apparatus for a guest to access a privileged register." The co-inventors are Gilbert Neiger, Portland, Ore., Richard A. Uhlig, Hillsboro, Ore., Dion Rodgers, Hillsboro, Ore., Jason W. Brandt, Austin, Texas, and Rajesh S. Parthasarathy, Hillsboro, Ore.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Embodiments of apparatuses and methods for guest processes to access registers are disclosed. In one embodiment, an apparatus includes an interface to a first register, shadow logic, evaluation logic, and exit logic. The shadow logic is to, in response to a guest attempt to write data to the first register, cause the data to be written to a second register. The evaluation logic is to determine, based on the value of the data, whether to transfer control to a host in response to the guest attempt. The exit logic is to transfer control to the host after the data is written to the second register if the evaluation logic determines to transfer control." The patent application was filed on June 30, 2005 (11/173,312). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,312,452&OS=8,312,452&RS=8,312,452 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Guarding Code Check-in with Test Case Execution Results ALEXANDRIA, Va., Nov. 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,312,430) developed by four co-inventors for a "guarding code check-in with test case execution results." The co-inventors are Debora O'Berry Best, Acton, Mass., Steven Francis Best, Acton, Mass., Robert James Eggers Jr., Austin, Texas, and Janice Marie Girouard, Austin, Texas.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A mechanism for providing a source code control system that employs test case execution results to mandate that software code have a specific level of quality for check-in to a central repository. A request to check-in a modified copy of a source code file to a repository is received, wherein the modified copy comprises changes to the source code file located in the repository. The modified copy of the source code file is placed in a quality check pending state in the repository. Responsive to an occurrence of a specific event or expiration of a set time period, applicable regression test cases are executed against the changes in the modified copy. A determination is made as to whether the regression test cases are successful. If the regression test cases are successful, the changes in the modified copy are committed to the source code file located in the repository." The patent application was filed on Aug. 27, 2008 (12/199,330). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,312,430&OS=8,312,430&RS=8,312,430 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Hardware Based Dynamic Load Balancing of Message Passing Interface Tasks by Modifying Tasks ALEXANDRIA, Va., Nov. 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,312,464) developed by four co-inventors for a "hardware based dynamic load balancing of message passing interface tasks by modifying tasks." The co-inventors are Lakshminarayana B. Arimilli, Austin, Texas, Ravi K. Arimilli, Austin, Texas, Ramakrishnan Rajamony, Austin, Texas, and William E. Speight, Austin, Texas.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Mechanisms are provided for providing hardware based dynamic load balancing of message passing interface (MPI) tasks by modifying tasks. Mechanisms for adjusting the balance of processing workloads of the processors executing tasks of an MPI job are provided so as to minimize wait periods for waiting for all of the processors to call a synchronization operation. Each processor has an associated hardware implemented MPI load balancing controller. The MPI load balancing controller maintains a history that provides a profile of the tasks with regard to their calls to synchronization operations. From this information, it can be determined which processors should have their processing loads lightened and which processors are able to handle additional processing loads without significantly negatively affecting the overall operation of the parallel execution system. Thus, operations may be performed to shift workloads from the slowest processor to one or more of the faster processors." The patent application was filed on Aug. 28, 2007 (11/846,168). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,312,464&OS=8,312,464&RS=8,312,464 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** AT&T Intellectual Property I Assigned Patent ALEXANDRIA, Va., Nov. 15 -- AT&T Intellectual Property I, Atlanta, has been assigned a patent (8,312,158) developed by Randolph Wohlert, Austin, Texas, and Paul Van Vleck, Austin, Texas, for a "system and method for providing multimedia digital rights transfer." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method for transferring digital multimedia rights, the method including but not limited to receiving at a digital multimedia rights server, from a source end user device associated with a source end user, a request for a transfer of a source set of digital multimedia rights associated with the source end user; determining a destination end user associated with a destination end user device to which the digital multimedia rights will be transferred; requesting permission from the destination end user to transfer the digital multimedia rights to the destination end user device; and if the permission is received from the destination end user, canceling the source set of digital multimedia rights associated with the source end user and transferring the source set of digital multimedia rights associated with the source end user to the destination end user device. A system and computer program product are disclosed for performing the method." The patent application was filed on Jan. 26, 2010 (12/693,521). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,312,158.PN.&OS=PN/8,312,158&RS=PN/8,312,158 Written by Kusum Sangma; edited by Anand Kumar.

*** Clearwire IP Holdings Assigned Patent for Quality of Service Based Downlink Power Allocation ALEXANDRIA, Va., Nov. 15 -- Clearwire IP Holdings, Bellevue, Wash., has been assigned a patent (8,311,573) developed by five co-inventors for a "quality of service based downlink power allocation." The co-inventors are Esmail Hejazi Dinan, Herndon, Va., Krishna D. Sitaram, Chantilly, Va., Jong-hak Jung, Herndon, Va., Swati Tiwari, Austin, Texas, and Hemanth Balaji Pawar, Herndon, Va.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A first wireless device associated with a first profile is communicated with using a first transmitted power. A second wireless device associated with a second profile is communicated with using a second transmitted power. A third transmitted power is determined. The third transmitted power is associated with the first wireless device receiving data using a target modulation and coding scheme. A maximum transmitted power is determined to be exceeded if the third transmitted power is used to communicate with the first wireless device. The second wireless device is communicated with using a fourth transmitted power. The fourth transmitted power allows the third transmitted power to be used to communicate with the first wireless device without exceeding the maximum transmitted power." The patent application was filed on April 24, 2012 (13/454,261). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,311,573.PN.&OS=PN/8,311,573&RS=PN/8,311,573 Written by Kusum Sangma; edited by Anand Kumar.

*** Oracle International Assigned Patent for Generic Preventative User Interface Controls ALEXANDRIA, Va., Nov. 15 -- Oracle International, Redwood Shores, Calif., has been assigned a patent (8,312,171) developed by seven co-inventors for a "generic preventative user interface controls." The co-inventors are Reza B'Far, Huntington Beach, Calif., Lloyd Boucher, Santa Ana, Calif., Mike Adourian, Irvine, Calif., Fei Wihardjo, Austin, Texas, Sreedhar Chitullapally, Irvine, Calif., Logan Goh, Irvine, Calif., and Malini Chakrabarti, Cliffside Park, N.J.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Techniques for enforcing policies. A user requests content from an application and content is retrieved from the application. A determination is made whether any policies apply to the content. A script adapted to modify processing of the content according to any applicable policies is injected into a response to the user. The script may be dynamically generated, pulled from a cache or other data store, or a combination thereof." The patent application was filed on March 29, 2010 (12/749,224). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,312,171.PN.&OS=PN/8,312,171&RS=PN/8,312,171 Written by Kusum Sangma; edited by Anand Kumar.

*** International Business Machines Assigned Patent for Recovery in Shared Memory Environment ALEXANDRIA, Va., Nov. 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,312,224) developed by Elmootazbellah Nabil Elnozahy, Austin, Texas, for a "recovery in shared memory environment." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system, and computer usable program product for recovery in a shared memory environment are provided in the illustrative embodiments. A core in a multi-core processor is designated as a user level core (ULC), which executes an instruction to modify a memory while executing an application. A second core is designated as a operating system core (OSC), which manages checkpointing of several segments of the shared memory. A set of flags is accessible to a memory controller to manage a shared memory. A flag in the set of flags corresponds to one segment in the segments of the shared memory. A message or instruction for modification of a segment is received. A cache line tracking determination is made whether a cache line used for the modification has already been used for a similar modification. If not, a part of the segment is checkpointed. The modification proceeds after checkpointing." The patent application was filed on May 27, 2010 (12/788,944). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,312,224.PN.&OS=PN/8,312,224&RS=PN/8,312,224 Written by Kusum Sangma; edited by Anand Kumar.

*** Clearwire IP Holdings Assigned Patent ALEXANDRIA, Va., Nov. 15 -- Clearwire IP Holdings, Bellevue, Wash., has been assigned a patent (8,311,574) developed by five co-inventors for a "quality of service based downlink power allocation." The co-inventors are Esmail Hejazi Dinan, Herndon, Va., Krishna D. Sitaram, Chantilly, Va., Jong-hak Jung, Herndon, Va., Swati Tiwari, Austin, Texas, and Hemanth Balaji Pawar, Herndon, Va.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A first wireless device associated with a first profile is communicated with using a first transmitted power. A second wireless device associated with a second profile is communicated with using a second transmitted power. A third transmitted power is determined. The third transmitted power is associated with the first wireless device receiving data using a target modulation and coding scheme. A maximum transmitted power is determined to be exceeded if the third transmitted power is used to communicate with the first wireless device. The second wireless device is communicated with using a fourth transmitted power. The fourth transmitted power allows the third transmitted power to be used to communicate with the first wireless device without exceeding the maximum transmitted power." The patent application was filed on April 24, 2012 (13/454,538). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,311,574.PN.&OS=PN/8,311,574&RS=PN/8,311,574 Written by Kusum Sangma; edited by Anand Kumar.

*** International Business Machines Assigned Patent for Optimizing Execution of Single-threaded Programs on a Multiprocessor Managed by Compilation ALEXANDRIA, Va., Nov. 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,312,455) developed by four co-inventors for an "optimizing execution of single-threaded programs on a multiprocessor managed by compilation." The co-inventors are Robert H. Bell Jr., Austin, Texas, Louis Bennie Capps Jr., Georgetown, Texas, Michael A. Paolini, Austin, Texas, and Michael Jay Shapiro, Austin, Texas.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method for optimizing execution of a single threaded program on a multi-core processor. The method includes dividing the single threaded program into a plurality of discretely executable components while compiling the single threaded program; identifying at least some of the plurality of discretely executable components for execution by an idle core within the multi-core processor; and enabling execution of the at least one of the plurality of discretely executable components on the idle core." The patent application was filed on Dec. 19, 2007 (11/960,021). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,312,455&OS=8,312,455&RS=8,312,455 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Pre-fetching Virtual Environment in a Virtual Universe Based on Previous Traversals ALEXANDRIA, Va., Nov. 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,312,223) developed by five co-inventors for a "pre-fetching virtual environment in a virtual universe based on previous traversals." The co-inventors are Rosa M. Bolger, Austin, Texas, Ann Corrao, Raleigh, N.C., Rick A. Hamilton II, Charlottesville, Va., Brian M. O'Connell, Cary, N.C., and Brian J. Snitzer, Lancaster, Pa.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "An approach is provided for pre-fetching of virtual content in a virtual universe based on previous traversals. In one embodiment, there is a pre-fetching tool, including a ranking component configured to rank each of a plurality of parcels of locations previously visited by an avatar according to predefined ranking criteria. The pre-fetching tool further includes a pre-fetching component configured to pre-fetch a virtual content of said parcels of locations based on the ranking." The patent application was filed on Dec. 23, 2008 (12/342,543). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,312,223.PN.&OS=PN/8,312,223&RS=PN/8,312,223 Written by Kusum Sangma; edited by Anand Kumar.

*** International Business Machines Assigned Patent for Managing Memory Allocations Loans ALEXANDRIA, Va., Nov. 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,312,201) developed by Matthew D. Fleming, Austin, Texas, for a "managing memory allocations loans." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A mechanism for operating a virtual memory is provided in an operating system. The mechanism detects the existence of a central memory loan pool, identifies a segment of memory that is loanable, and transmits an indicator that the segment is available for loaning to the memory loan pool. The operating system contributing memory can monitor its actual memory capacity and reclaim the loaned segment if the amount of memory available to the loaning operating system (OS) gets below a predetermined value." The patent application was filed on June 9, 2008 (12/135,494). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,312,201.PN.&OS=PN/8,312,201&RS=PN/8,312,201 Written by Kusum Sangma; edited by Anand Kumar.

*** Verizon Patent and Licensing Assigned Patent ALEXANDRIA, Va., Nov. 15 -- Verizon Patent and Licensing, Basking Ridge, N.J., has been assigned a patent (8,311,547) developed by Michael W. Hilden, Richardson, Texas, and Christopher D. Pikulinski, Carrollton, Texas, for a "method and system for maintaining response center information." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system for and method of maintaining response center information is presented. In one exemplary embodiment, the system for and method of maintaining response center information may comprise receiving, via an electronic interface, electronic data associated with emergency communications handling, processing, using a processor, the electronic data to associate a portion of the electronic data with a geographical boundary, identifying a modification to geographical boundary, and determining a communication address associated with the modification to the geographical boundary." The patent application was filed on Oct. 20, 2009 (12/582,225). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,311,547.PN.&OS=PN/8,311,547&RS=PN/8,311,547 Written by Kusum Sangma; edited by Anand Kumar.

*** Cinsay Assigned Patent ALEXANDRIA, Va., Nov. 15 -- Cinsay, Dallas, has been assigned a patent (8,312,486) developed by four co-inventors for an "interactive product placement system and method therefor." The co-inventors are Christian Briggs, Newport Coast, Calif., Heath McBurnett, Aliso Viejo, Calif., Delfino Galindo Jr., Laguna Niguel, Calif., and Freddy Knuth, Euless, Texas.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method for presenting advertisements for commercial products in video productions, whereby the commercial product is placed in the video production as an element of the video production. A viewer is enabled to interact with the video production to select the product. Information is then displayed about the selected product; and the viewer is enabled to purchase the selected product." The patent application was filed on Jan. 30, 2009 (12/363,713). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,312,486&OS=8,312,486&RS=8,312,486 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Apple Assigned Patent for Dynamic Allocation of Host IP Addresses ALEXANDRIA, Va., Nov. 15 -- Apple, Cupertino, Calif., has been assigned a patent (8,311,552) developed by Mohamed Khalil, Murphy, Texas, and Haseeb Akhtar, Garland, Texas, for a "dynamic allocation of host IP addresses." The abstract of the patent published by the U.S. Patent and Trademark Office states: "The present invention facilitates dynamic allocation of home IP addresses for a mobile node, when it is roaming away from a home network and supported by a foreign network. After the mobile node obtains a care-of address from the foreign network, a stateful or stateless configuration process is used to dynamically allocate a home IP address for the mobile node. In the stateful approach, a binding update message is used to request a home IP address for the mobile node from its home agent. In a stateless embodiment, the mobile node will create a home IP address, which is sent to the home agent for verification via the binding update message. The home agent will receive the home IP address in the binding update message, verify the home IP address, and send acknowledgement of the verification, assuming the home IP address is verified, to the mobile node." The patent application was filed on Feb. 25, 2005 (11/065,899). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,311,552.PN.&OS=PN/8,311,552&RS=PN/8,311,552 Written by Kusum Sangma; edited by Anand Kumar.

*** International Business Machines Assigned Patent for Central Repository for Wake-and-go Mechanism ALEXANDRIA, Va., Nov. 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,312,458) developed by Ravi K. Arimilli, Austin, Texas, Satya P. Sharma, Austin, Texas, and Randal C. Swanberg, Round Rock, Texas, for a "central repository for wake-and-go mechanism." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A wake-and-go mechanism is provided with a central repository wake-and-go array for a multiple processor data processing system. The wake-and-go mechanism recognizes a programming idiom that indicates that a thread running on a processor within the multiple processor data processing system is waiting for an event. The wake-and-go mechanism updates a central repository wake-and-go array with a target address associated with the event. Each entry in the central repository wake-and-go array may include a thread identification (ID), a central processing unit (CPU) ID, the target address, the expected data, a comparison type, a lock bit, a priority, and a thread state pointer, which is the address at which the thread state information is stored." The patent application was filed on Feb. 1, 2008 (12/024,384). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,312,458&OS=8,312,458&RS=8,312,458 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Dell Products Assigned Patent ALEXANDRIA, Va., Nov. 15 -- Dell Products, Round Rock, Texas, has been assigned a patent (8,312,177) developed by four co-inventors for a "system and method for dynamically configuring a target device." The co-inventors are Gary B. Kotzur, Austin, Texas, Chandrashekar Nelogal, Round Rock, Texas, John R. Sieber, Cedar Park, Texas, and Kevin T. Marks, Round Rock, Texas.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "In accordance with the present disclosure, a method for dynamically configuring a target device comprises receiving by one or more ports of a target device one or more initiator identifiers from one or more initiators. The method further comprises determining whether a plurality of ports received initiator identifiers from a common initiator. The method further comprises configuring the plurality of the ports to operate as a single, logical port if the plurality of ports received initiator identifiers from a common initiator." The patent application was filed on Sept. 24, 2010 (12/890,062). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,312,177.PN.&OS=PN/8,312,177&RS=PN/8,312,177 Written by Kusum Sangma; edited by Anand Kumar.

*** International Business Machines Assigned Patent for Mode-based Castout Destination Selection ALEXANDRIA, Va., Nov. 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,312,220) developed by five co-inventors for a "mode-based castout destination selection." The co-inventors are Guy L. Guthrie, Austin, Texas, Harmony L. Helterhoff, Cedar Park, Texas, William J. Starke, Round Rock, Texas, Phillip G. Williams, Leander, Texas, and Jeffrey A. Stuecheli, Austin, Texas.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "In response to a data request of a first of a plurality of processing units, the first processing unit selects a victim cache line to be castout from the lower level cache of the first processing unit and determines whether a mode is set. If not, the first processing unit issues on the interconnect fabric an LCO command identifying the victim cache line and indicating that a lower level cache is the intended destination. If the mode is set, the first processing unit issues a castout command with an alternative intended destination. In response to a coherence response to the LCO command indicating success of the LCO command, the first processing unit removes the victim cache line from its lower level cache, and the victim cache line is held elsewhere in the data processing system. The mode can be set to inhibit castouts to system memory, for example, for testing." The patent application was filed on April 9, 2009 (12/420,933). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,312,220.PN.&OS=PN/8,312,220&RS=PN/8,312,220 Written by Kusum Sangma; edited by Anand Kumar.

*** Texas Instruments Assigned Patent for Methods and Apparatus to Minimize Saturation in a Ground Fault Detection Device ALEXANDRIA, Va., Nov. 15 -- Texas Instruments, Dallas, has been assigned a patent (8,311,785) developed by Artur J. Lewinski, Dallas, Ross Teggatz, McKinney, Texas, and Thomas Edward Cosby, Rockwall, Texas, for "methods and apparatus to minimize saturation in a ground fault detection device." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods and apparatus to minimize saturation in a ground fault detection device are disclosed. An example method includes connecting a capacitor simulator to a node of the ground fault detector device to prevent saturation, and monitoring power-line conductors for ground fault conditions with the ground fault detector device. An example apparatus to simulate a saturation capacitance in a ground fault device includes a sense coil induced by power-line conductors, and at least one of an amplifier or a current detector including an input connected to the sense coil and an output connected to a ground fault detector. The example apparatus also includes a saturation capacitor simulator connected to a node of at least one of the amplifier or the current detector to prevent saturation." The patent application was filed on Oct. 24, 2007 (11/923,354). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,311,785&OS=8,311,785&RS=8,311,785 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Texas Instruments Assigned Patent ALEXANDRIA, Va., Nov. 15 -- Texas Instruments, Dallas, has been assigned a patent (8,312,399) developed by Gang Peter Fang, Plano, Texas, Ning Dong, Plano, Texas, and Zhongze Li, Plano, Texas, for a "method and system for generating partitioned matrices for parallel circuit simulation." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Over the years, parallel processing has become increasingly common. Conventional circuit simulators have not taken full advantage of these developments, however. Here, a circuit simulator and system are provided that partitions circuit matrices to allow for more efficient parallel processing to take place. By doing this, the overall speed and reliability of the circuit simulator can be increased." The patent application was filed on Oct. 22, 2009 (12/604,185). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,312,399&OS=8,312,399&RS=8,312,399 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Synopsys Assigned Patent for Method and Apparatus for Determining Mask Layouts for a Spacer-Is-dielectric Self-aligned Double-patterning Process ALEXANDRIA, Va., Nov. 15 -- Synopsys, Mountain View, Calif., has been assigned a patent (8,312,394) developed by Yonchan Ban, Austin, Texas, and Kevin D. Lucas, Austin, Texas, for a "method and apparatus for determining mask layouts for a spacer-is-dielectric self-aligned double-patterning process." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods and apparatuses are described for determining mask layouts for printing a design intent on a wafer using a spacer-is-dielectric self-aligned double-patterning process. A system can determine whether a graph corresponding to a design intent is two-colorable. If the graph is not two-colorable, the system can merge one or more pairs of shapes in the design intent to obtain a modified design intent, so that a modified graph corresponding to the modified design intent is two-colorable. The system can then determine a two-coloring for the modified graph. Next, the system can place one or more core shapes in a mandrel mask layout which correspond to vertices in the modified graph that are associated with a selected color in the two-coloring. The system can then place one or more shapes in a trim mask layout for separating the shapes in the design intent that were merged." The patent application was filed on Nov. 29, 2010 (12/955,670). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,312,394&OS=8,312,394&RS=8,312,394 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Verizon Patent and Licensing Assigned Patent ALEXANDRIA, Va., Nov. 15 -- Verizon Patent and Licensing, Basking Ridge, N.J., has been assigned a patent (8,311,776) developed by Robert Blackledge, McKinney, Texas, for "methods, systems and computer program products for throughput-testing of electronic data systems." The abstract of the patent published by the U.S. Patent and Trademark Office states: "The Data Throughput Tester ("DTT") provides efficient and reliable methods to characterize the performance capabilities of electronic data systems. Embodiments of the DTT may allow test organizations to find the throughput limitations of a data system under test to the nearest whole packet in both an efficient and reliable manner. Embodiments of the DTT may allow determination of the throughput of a data system under test under the requirement that data output obtained from the data system is identical to the data input provided to the data system. Further embodiments of the DTT may allow determination of the throughput of a data system under test under the condition that specific performance characteristics of the data system under test satisfy pre-defined benchmark parameters. Further embodiments of the DTT may allow determination of the optimum throughput of a data system under test wherein different benchmark parameters are applied when testing the data system under different regimes of performance operating conditions. Further embodiments of the DTT highlighting various other advantageous aspects are discussed in the instant disclosure." The patent application was filed on Dec. 1, 2009 (12/629,028). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,311,776&OS=8,311,776&RS=8,311,776 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Organizational Design Approach to Transition Cost Assessment for Business Transformation ALEXANDRIA, Va., Nov. 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,311,862) developed by four co-inventors for an "organizational design approach to transition cost assessment for business transformation." The co-inventors are Jinchao Hunag, Markham, Canada, John W. Sweitzer, Austin, Texas, Yi-Hsiu Wei, Austin, Texas, and Kamorudeen Larry Yusuf, Hampshire, United Kingdom.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method for facilitating in assessing transitional costs in business transformations using a computer-aided organizational design system is provided. The method comprises creating a first organization design model representative of the current organizational design state of an organization using a graphical tool. The method further comprises changing the first organization design model into a second organization design model representative of the organizational design state of the organization after the business transformation. The method further comprises generating a report identifying the transition cost factors and the transition cost of moving from the first organization design model to the second organization design model, wherein the transition cost is determined based on predetermined calculation algorithms or heuristics." The patent application was filed on Aug. 29, 2007 (11/846,603). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,311,862&OS=8,311,862&RS=8,311,862 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** Hewlett-Packard Development Assigned Patent for Generating A Resource Allocation Action Plan ALEXANDRIA, Va., Nov. 15 -- Hewlett-Packard Development, Houston, has been assigned a patent (8,311,865) developed by Eric S. Vogel, Richardson, Texas, and Dean E. Moody, Wylie, Texas, for a "generating a resource allocation action plan." The abstract of the patent published by the U.S. Patent and Trademark Office states: "Systems and techniques are provided for resource allocation planning. A future supply of resources and a future demand for resources may be identified for one or more future time periods and/or for one or more resource categories. The identified supply and the identified demand may then be combined to calculate gross gaps and surpluses in supply and demand for each of the future time periods and/or each of the resource categories. One or more resource allocation adjustments for addressing the gross gaps and surpluses in supply and demand may be received, and net gaps and surpluses for each future time period and or each resource category from the gross gaps and surpluses and the one or more received resource allocation adjustments." The patent application was filed on Feb. 14, 2003 (10/368,282). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,311,865&OS=8,311,865&RS=8,311,865 Written by Satyaban Rath; edited by Hemanta Panigrahi.

*** International Business Machines Assigned Patent for Mashup Application Processing System ALEXANDRIA, Va., Nov. 15 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,312,383) developed by Michael Gilfix, Austin, Texas, for a "mashup application processing system." The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method, programmed medium and system are provided for enabling a user to move a piece of data or context to another page in a mashup application. Rather than linking directly between pages, pages are "linked" by a drag-and-drop action of the user. To move a piece of data or context to another page, the user drags an item from the current mashup page onto the tab of a target page to which the data item is to be moved. The dropping of a text item on, for example, a tab of a target page causes an event to be fired on the target page, which may be wired to widgets contained within the target page. The target tab is then brought into focus and its page contents displayed. Visual indicators are also provided on source pages to indicate the target pages, which will "accept" the dragged contents." The patent application was filed on July 24, 2009 (12/509,133). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,312,383&OS=8,312,383&RS=8,312,383 Written by Satyaban Rath; edited by Hemanta Panigrahi.

For more information about Targeted News Service products and services, please contact: Myron Struck, editor, Targeted News Service LLC, Springfield, Va., 703/304-1897; editor@targetednews.com; http://targetednews.com.

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